20250189723. Semiconductor Device Fabrication Method Ther (Vanguard International Semiconductor)
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
Abstract: a method of fabricating a semiconductor device includes providing a substrate that includes a handle substrate, a bottom cladding layer, and a semiconductor layer stacked in sequence from bottom to top. the substrate includes an electronic integrated circuit (eic) region and a photonic integrated circuit (pic) region. a thermal oxidation process is performed on the semiconductor layer in the pic region to form an oxide layer. a first thickness of the semiconductor layer in the eic region is greater than a second thickness of the semiconductor layer below the oxide layer. the oxide layer is removed and a pic structure is formed on the bottom cladding layer in the pic region. an eic structure is formed on the bottom cladding layer in the eic region. an interconnect structure is formed to be electrically connected to the pic and eic structures.
Inventor(s): Ming-Cheng Lo, Shih-Chang Huang, Jui-Chun Chang, Wu-Hsi Lu, Yu-Che Tsai, Shih-Hao Liu, Yen-Shih Ho
CPC Classification: G02B6/13 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS)
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- Patent Applications
- Vanguard International Semiconductor Corporation
- CPC G02B6/13
- Ming-Cheng Lo of New Taipei City TW
- Shih-Chang Huang of Hsinchu City TW
- Jui-Chun Chang of Hsinchu City TW
- Wu-Hsi Lu of Hsinchu City TW
- Yu-Che Tsai of Hsinchu City TW
- Shih-Hao Liu of Taoyuan City TW
- Yen-Shih Ho of Taoyuan City TW