POWER STAGE PACKAGE WITH HALF BRIDGE-CONNECTED TRANSISTOR CHIPS AND DRIVER CHIP HAVING THROUGH CONNECTION

Abstract: a package configured as power stage is disclosed. in one example, the package includes a first transistor chip and a second transistor chip being interconnected to form a half bridge, a driver chip configured for driving the first transistor chip and the second transistor chip, and an encapsulant at least partially encapsulating the first transistor chip, the second transistor chip. the driver chip, wherein the driver chip comprises electrically conductive driver pads, at least one of which being arranged on each of both opposing main surfaces of the driver chip, and comprises at least one electrically conductive driver through connection extending through the driver chip between said opposing main surfaces.

Inventor(s): Angela KESSLER, Matthias REINWALD, Robert FEHLER

CPC Classification: H01L25/072 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (use of semiconductor devices for measuring ; resistors in general ; magnets, inductors or transformers ; capacitors in general ; electrolytic devices ; batteries or accumulators ; waveguides, resonators or lines of the waveguide type ; line connectors or current collectors ; stimulated-emission devices ; electromechanical resonators ; loudspeakers, microphones, gramophone pick-ups or like acoustic electromechanical transducers ; electric light sources in general ; printed circuits, hybrid circuits, casings or constructional details of electrical apparatus, manufacture of assemblages of electrical components ; use of semiconductor devices in circuits having a particular application, see the subclass for the application))

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