METHOD OF FABRICATING A SEMICONDUCTOR CHIP

Abstract: a method of fabricating a semiconductor chip includes the following steps. a bonding material layer is formed on a first wafer substrate and is patterned to form a first bonding layer having a strength adjustment pattern. a semiconductor component layer and a first interconnect structure layer are formed on a second wafer substrate. the first interconnect structure layer is located. a second bonding layer is formed on the first interconnect structure layer. the second wafer substrate is bonded to the first wafer substrate by contacting the second bonding layer with the first bonding layer. a bonding interface of the second bonding layer and the first bonding layer is smaller than an area of the second bonding layer. a second interconnect structure layer is formed on the semiconductor component layer. a conductor terminal is formed on the second interconnect structure layer.

Inventor(s): Hong-Wei Chan, Jiing-Feng Yang, Yung-Shih Cheng, Yao-Te Huang, Hui Lee

CPC Classification: H01L24/94 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (use of semiconductor devices for measuring ; resistors in general ; magnets, inductors or transformers ; capacitors in general ; electrolytic devices ; batteries or accumulators ; waveguides, resonators or lines of the waveguide type ; line connectors or current collectors ; stimulated-emission devices ; electromechanical resonators ; loudspeakers, microphones, gramophone pick-ups or like acoustic electromechanical transducers ; electric light sources in general ; printed circuits, hybrid circuits, casings or constructional details of electrical apparatus, manufacture of assemblages of electrical components ; use of semiconductor devices in circuits having a particular application, see the subclass for the application))

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