20250183026. Integrated Method Low-cost Wi (ThinSiC .)
Integrated Method For Low-Cost Wide Band Gap Semiconductor Device Manufacturing
Abstract: a merge layer of silicon carbide (sic) or gallium nitride (gan) is formed overlying a substrate. the substrate comprises sic or gan. a surface of the merge layer comprises an epitaxial layer formed by epitaxial lateral overgrowth. one or more epitaxial layers are formed overlying the merge layer. the surface of the merge layer is configured to reduce a propagation of defects from the substrate to the one or more epitaxial layers. a plurality of semiconductor devices are formed in or on the oner or more epitaxial layers.
Inventor(s): Tirunelveli Subramaniam Ravi, Bishnu Gogoi
CPC Classification: H01L21/02019 ({Chemical etching})
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