MEMORYS, OPERATION METHODS THEREOF AND MEMORY SYSTEMS

Abstract: memories, operation methods and memory systems are provided. an example memory includes m memory banks and a peripheral circuit including a control signal synthesis circuit and a first read register. the control signal synthesis circuit includes input terminals and a first output terminal. each input terminal is connected with one corresponding memory bank and the first output terminal is connected with the first read register. the control signal synthesis circuit is configured to receive control signals through input terminals and output an overall control signal through the first output terminal. a path from each input terminal to the first output terminal in the control signal synthesis circuit has a same length. the first read register is configured to receive the overall control signal and data read from at least one of the m memory banks and output the read data based on the overall control signal.

Inventor(s): Ling Ding, ShiYang Yang, Yong Fu

CPC Classification: G11C11/4093 (Input/output [I/O] data interface arrangements, e.g. data buffers)

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