20250181814. Differentiable Global Route (NVIDIA)
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DIFFERENTIABLE GLOBAL ROUTER
Abstract: mechanisms for generating metal routing guides in a circuit involve forming a plurality of directed acyclic graphs (dags) embodying routing trees for nets in the circuit, generating 2-pin subnets and 2-pin path candidates from the routing trees, and forming a dag forest from the routing trees, the 2-pin subnets, and the 2-pin path candidates.
Inventor(s): Rongjian Liang, Haoxing Ren, Wei Li
CPC Classification: G06F30/394 (Circuit design at the physical level (physical level design for reconfigurable circuits ))
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