DATA PROCESSING

Abstract: data processing apparatus comprises vector processing circuitry to access an array register having at least n�n storage locations, where n is an integer greater than one, the vector processing circuitry comprising: instruction decoder circuitry to decode program instructions; and instruction processing circuitry to execute instructions decoded by the instruction decoder circuitry. the instruction decoder circuitry is responsive to an array access instruction, to control the instruction processing circuitry to access, for a vector of n vector elements, a set of n storage locations each having a respective array location in the array register. the array location accessed for a given vector element of the vector is defined by one or more coordinates associated with the given vector element by one or more parameters of the array access instruction.

Inventor(s): Eric Biscondi, Didier Martinot, Joe Savage

CPC Classification: G06F9/30036 ({Instructions to perform operations on packed data, e.g. vector, tile or matrix operations})

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