STACK MEMORY DEVICES CONFIGURED TO COMMUNICATE VIA PACKETS

Abstract: a stack memory device includes a physical layer configured to receive write data, a write valid signal, and a transmission write clock signal from an external device and transmit read data, a read valid signal, and a transmission read clock signal to the external device, a selector configured to output a signal output from the physical layer through a first channel or a second channel, based on a channel selection signal, and a control layer configured to receive an output signal of the selector through the first channel or the second channel to generate a control command and an address for controlling a write operation or a read operation within a core chip.

Inventor(s): Choung Ki SONG

CPC Classification: G06F3/0607 ({by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device})

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