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20250180632. Method Apparatus Redu (Intel)

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METHOD AND APPARATUS TO REDUCE SIZE OF MEMORY TO STORE TEST CONTENT IN A CHANNEL CARD IN AUTOMATIC TEST EQUIPMENT TO TEST AN INTEGRATED CIRCUIT

Abstract: a portion of test content to test a device under test (dut) in automatic test equipment (ate) is loaded by a controller in the ate in a memory partition in a channel card in the ate prior to start of the test of the dut. a next portion of the test content is dynamically loaded by the controller in another partition of the memory while the portion of test content is being used to test the dut. the size of the memory in the channel card is reduced because all test content for the test of the dut is not stored in the memory prior to start of the test of the dut.

Inventor(s): Shelby G. ROLLINS, Sundar V. PATHY

CPC Classification: G01R31/2834 (Testing of electronic circuits, e.g. by signal tracer ({EMC, EMP or similar testing of electronic circuits ;} testing for short-circuits, discontinuities, leakage or incorrect line connection ; checking computers {or computer components} ; checking static stores for correct operation {; testing receivers or transmitters of transmission systems }))

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