MEMORY CELL, INTEGRATED CIRCUIT, AND MANUFACTURING METHOD OF MEMORY CELL

Abstract: a memory cell includes a bottom electrode, a top electrode, and a variable resistance layer. the top electrode is disposed over the bottom electrode. the variable resistance layer is sandwiched between the bottom electrode and the top electrode. a first portion of a bottom surface of the variable resistance layer and a second portion of the bottom surface of the variable resistance layer are parallel to each other and are located at different level heights.

Inventor(s): Yu-Chao Lin, Tung-Ying Lee, Da-Ching Chiou

CPC Classification: H10N70/023 ()

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