Nano-FET Transistor with Alternating Nanostructures and Method of Forming Thereof

Abstract: a method of forming a semiconductor device includes forming a sacrificial layer over a first stack of nanostructures and an isolation region. a dummy gate structure is formed over the first stack of nanostructures, and a first portion of the sacrificial layer. a second portion of the sacrificial layer is removed to expose a sidewall of the first stack of nanostructures adjacent the dummy gate structure. a spacer layer is formed over the dummy gate structure. a first portion of the spacer layer physically contacts the first stack of nanostructures.

Inventor(s): Te-En Cheng, Yung-Cheng Lu, Chi On Chui, Wei-Yang Lee

CPC Classification: H10D30/031 (No explanation available)

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