FLASH MEMORY INCLUDING SELF-ALIGNED FLOATING GATES

Abstract: an integrated circuit (ic) including flash memory cells with self-aligned floating gates and a method of fabrication thereof is disclosed. a floating gate (fg) layer of polysilicon is deposited and patterned to form fg structures as part of a masking block used in forming isolation trenches. a dielectric fill material fills the isolation trenches. subsequently, the dielectric fill material is removed using a cmp process that is configured to stop on the polysilicon of the fg structures.

Inventor(s): Robert Cassel, Giulio Albini, Gowrisankar Damarla, Ximeng Liu, Gavin Wardle, Ryan Rust, Robert Ringhofer, Brian Ellingwood

CPC Classification: H10B41/30 (ELECTRONIC MEMORY DEVICES)

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