MEMORY DEVICE PERFORMING REFRESH OPERATION AND OPERATION METHOD THEREOF

Abstract: a memory device, including: a plurality of core dies, wherein each core die of the plurality of core dies includes a plurality of channel areas including a plurality of bank arrays, and wherein the plurality of core dies are stacked in a vertical direction; and a logic die below the plurality of core dies, wherein the logic die includes a memory controller and at least one temperature sensor configured to transmit data to the plurality of channel areas and to receive data from the plurality of channel areas using a plurality of channels, wherein the memory controller is configured to independently adjust refresh cycles of the plurality of bank arrays based on temperature values obtained from a plurality of first temperature sensors included in the plurality of channel areas and a second temperature sensor included in the logic die.

Inventor(s): Seungbum BAEK, Sungcheol PARK, Mingoo KANG, Hyunmin KYUNG, Sanghune PARK, Juyeon LEE

CPC Classification: G11C11/40626 (STATIC STORES (semiconductor memory devices ))

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