Reducing Unknown Values in Automatic Test Pattern Generation Testing

Abstract: systems and techniques directed at reducing unknown values in automatic test pattern generation testing are disclosed. various paths through a circuit design that generate an unknown value (e.g., not a value of zero or a value of one) during automatic test pattern generation testing are identified. a value override circuit may be inserted into paths identified as providing an unknown value. the value override circuit may be programmed to provide an output of a value of zero or a value of one during automatic test pattern generation testing. the insertion of value override circuits within a circuit design may reduce unknown values in automatic test pattern generation testing of the circuit design. the reduction of unknown values generated during automatic test pattern generation testing of a circuit design saves time and, thus, money.

Inventor(s): Veerabhadra Rao Vasa, Vevekanenda Gonugunta

CPC Classification: G06F30/333 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models ))

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