20250169227. Device Incl (Sensor Electronic Technology, .)
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Device Including a Semiconductor Layer With Graded Composition
Abstract: an improved heterostructure for an optoelectronic device is provided. the heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. the heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. in an embodiment, the electron blocking layer can have a region of graded transition. the p-type interlayer can also include a region of graded transition.
Inventor(s): Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur
CPC Classification: H10H20/811 (No explanation available)
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