SEMICONDUCTOR DEVICE, PHOTODETECTOR DEVICE, AND ELECTRONIC APPARATUS

Abstract: a semiconductor device capable of achieving both short channel suppression and suppression of variations in transistor characteristics that includes a semiconductor substrate and a field-effect transistor on the semiconductor substrate. the field-effect transistor includes a diffusion layer region in which a channel is formed, a gate electrode covering at least a part of the diffusion layer region and having a side wall facing a side surface of the diffusion layer region and a top plate facing an upper surface of the diffusion layer region, a source region connected to one side of the gate electrode, and a drain region connected to the other side of the gate electrode portion. the side wall and the top plate of the gate electrode have a self-aligned structure. the source region and the drain region are formed to be self-aligned by implanting impurities obliquely into the side wall portion of the gate electrode portion.

Inventor(s): Yuki KAWAHARA, Hideomi KUMANO

CPC Classification: H10F39/80377 (No explanation available)

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