20250169179. Semiconductor Structure Method Manufacturing Sa (TAIWAN SEMICONDUCTOR MANUFACTURING .)
SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
Abstract: a semiconductor structure includes a first transistor, a second transistor, a first dummy source/drain, a third transistor, a fourth transistor, and a second dummy source/drain. the first transistor and a second transistor adjacent to the first transistor are at a first elevation. the first dummy source/drain is disposed at the first elevation. the third transistor and a fourth transistor adjacent to the third transistor, are at a second elevation different from the first elevation. the second dummy source/drain is disposed at the second elevation. the second transistor is vertically aligned with the third transistor. the first dummy source/drain is vertically aligned with a source/drain of the fourth transistor. the second dummy source/drain is vertically aligned with a source/drain of the first transistor. the gate structure between the second dummy source/drain and a source/drain of the third transistor is absent. a method for manufacturing a semiconductor structure is also provided.
Inventor(s): POCHUN WANG, GUO-HUEI WU, HUI-ZHONG ZHUANG, CHIH-LIANG CHEN, LI-CHUN TIEN
CPC Classification: H10D86/215 (No explanation available)
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