TRANSISTOR DEVICES WITH MULTI-LAYER INTERLAYER DIELECTRIC STRUCTURES

Abstract: a transistor device includes a channel region, a first source/drain region adjacent to a first end of the channel region and a second source/drain region adjacent to a second end of the channel region, a gate structure disposed on the channel region, the first source/drain region and the second source/drain region, and an interlayer dielectric (ild) structure disposed on the gate structure. the ild structure includes a first dielectric layer including a first set of sublayers. the first set of sublayers includes a first sublayer including a first dielectric material having a first hydrogen concentration and a second sublayer including the first dielectric material having a second hydrogen concentration lower than the first hydrogen concentration. the ild structure further includes a second dielectric layer including a second set of sublayers. the second set of sublayers includes a third sublayer including a second dielectric material different from the first dielectric material.

Inventor(s): Yun-Chu Tsai, Dejiu Fan, Jung Bae Kim, Yang Ho Bae, Rodney Shunleong Lim, Dong Kil Yim

CPC Classification: H10D30/6757 (No explanation available)

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