20250169112. Semiconductor Structures Methods Ther (Taiwan Semiconductor Manufacturing , .)
Semiconductor Structures and Methods Thereof
Abstract: a structure has stacks of semiconductor layers over a substrate and adjacent a dielectric feature. a gate dielectric is formed wrapping around each layer and the dielectric feature. a first layer of first gate electrode material is deposited over the gate dielectric and the dielectric feature. the first layer on the dielectric feature is recessed to a first height below a top surface of the dielectric feature. a second layer of the first gate electrode material is deposited over the first layer. the first gate electrode material in a first region of the substrate is removed to expose a portion of the gate dielectric in the first region, while the first gate electrode material in a second region of the substrate is preserved. a second gate electrode material is deposited over the exposed portion of the gate dielectric and over a remaining portion of the first gate electrode material.
Inventor(s): Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu, Kuan-Lun Cheng, Chih-Hao Wang
CPC Classification: H10D30/6735 (No explanation available)
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- Patent Applications
- Taiwan Semiconductor Manufacturing Company, Ltd.
- CPC H10D30/6735
- Chung-Wei Hsu of Hsinchu County TW
- Kuo-Cheng Chiang of Hsinchu County TW
- Mao-Lin Huang of Hsinchu City TW
- Lung-Kun Chu of New Taipei City TW
- Jia-Ni Yu of New Taipei City TW
- Kuan-Lun Cheng of Hsin-Chu TW
- Chih-Hao Wang of Hsinchu County TW