INTEGRATED CIRCUIT WITH MULTI-APPLICATION IMAGE PROCESSING

Abstract: in described examples, an integrated circuit includes first, second, third, and fourth image processing blocks, a data selection circuitry, and a pipeline memory. an input of the first image processing block receives raw image data. an input of the second image processing block is coupled to an output of the first image processing block. an input of the third image processing block is coupled to an output of the second image processing block. a first input of the data selection circuitry is coupled to an output of the first image processing block, and a second input of the data selection circuitry is coupled to an output of the second image processing block. a data input of the pipeline memory is coupled to an output of the data selection circuitry, and an output of the pipeline memory is coupled to an input of the fourth image processing block.

Inventor(s): Niraj Nandan, Mihir Mody, Rajasekhar Allu, Manoj Koul, Pandy Kalimuthu, David Stoller

CPC Classification: H04N23/81 (for suppressing or minimising disturbance in the image signal generation)

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