PHASE-LOCKED LOOP CONTROL CIRCUIT, PHASE-LOCKED LOOP CIRCUIT AND CONTROL METHOD THEREOF

Abstract: a pll circuit includes a reference current generation circuit, a frequency calibration circuit, a magnification adjustment circuit, an oscillation circuit and a front-end circuit. the frequency calibration circuit generates a current adjustment signal according to a target frequency. the magnification adjustment circuit adjusts a reference current to a target frequency current according to the current adjustment signal. the oscillation circuit generates an output clock signal according to the target frequency current. the front-end circuit detects phase and frequency differences between the output clock signal and a reference clock signal to generate a first control signal. the oscillation circuit adjusts an output frequency to be the same as the target frequency based on the first control signal and the target frequency current. when the first control signal shifts, a second control signal is generated to adjust the target frequency current according to the reference current and the second control signal.

Inventor(s): Chun-Ching CHAN

CPC Classification: H03L7/0895 (the phase or frequency detector generating up-down pulses ( takes precedence))

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