SEMICONDUCTOR DEVICE AND MEMORY SYSTEM

Abstract: according to one embodiment, a semiconductor device includes a first substrate; a semiconductor chip provided in a first region of a first face of the first substrate; and a first structure provided in a second region of the first face, wherein the first substrate includes: wiring embedded in the first substrate; a first conductor coupled to the semiconductor chip and the wiring and exposed on the first face; and a second conductor coupled to the first conductor via the wiring and exposed on a second face of the first substrate, a height of the first structure in a first direction perpendicular to the first face is greater than a height of the semiconductor chip in the first direction, in a case where the first face is taken as a reference.

Inventor(s): Yuta TSUBOUCHI

CPC Classification: H01L23/5283 ({Geometry or} layout of the interconnection structure {( takes precedence; algorithms )})

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