MEMORY REPAIR CIRCUIT, A MEMORY REPAIR METHOD, AND A MEMORY DEVICE

Abstract: a memory repair circuit of a memory module including a plurality of memory packages, the memory repair circuit including: a test circuit configured to test the plurality of memory packages to obtain fail information in each of the plurality of memory packages; and a redundancy analysis circuit configured to: obtain a redundant address count in each of the plurality of memory packages, determine a repair order of the plurality of memory packages based on the fail information and the redundant address count, and perform a virtual repair on the plurality of memory packages in the repair order to determine an address to be repaired in each of the plurality of memory packages.

Inventor(s): Hyunseok KIM

CPC Classification: G11C29/12 (STATIC STORES (semiconductor memory devices ))

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