TRIM SETTING DETERMINATION FOR A MEMORY DEVICE

Abstract: the present disclosure includes apparatuses and methods related to a memory system including a controller and an array of memory cells. an example apparatus can include a controller configured to receive operational characteristics of an array of memory cells based on prior operations performed by the array of memory cells, determine a set of trim settings for the array of memory cells based on the operational characteristics of the array of memory cells, wherein the set of trim settings are associated with desired operational characteristics for the array of memory cells, and send the set of trim settings to the array of memory cells.

Inventor(s): Aswin Thiruvengadam, Daniel L. Lowrance, Peter Feeley

CPC Classification: G11C29/028 (STATIC STORES (semiconductor memory devices ))

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