SEMICONDUCTOR DEVICE AND OPERATING METHOD OF THE SAME

Abstract: a semiconductor device may include a memory cell connected to a first line and a second line, at least one of first transistors each configured to provide a first input voltage of a first node to the first line, and at least one of second transistors each configured to provide a second input voltage of a second node to the second line. polarities of the first and second input voltages provided to the first and second nodes may be determined based on data to be written in the memory cell. at least one of a voltage of each of control terminals of the first and second transistors and a back bias voltage of each of the first and second transistors is adjusted in response to a change in the polarity of each of the first and second input voltages.

Inventor(s): Take Kyun WOO

CPC Classification: G11C13/0069 ({Writing or programming circuits or methods})

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