MANAGEMENT OF PROGRAMMING MODE TRANSITIONS TO ACCOMMODATE A CONSTANT SIZE OF DATA TRANSFER BETWEEN A HOST SYSTEM AND A MEMORY SUB-SYSTEM

Abstract: a memory sub-system configured to manage programming mode transitions to accommodate a constant size of data transfer between a host system and a memory sub-system. the memory sub-system counts single-page transitions of atomic programming modes performed within a memory sub-system and determines whether or not to allow any two-page transition of atomic programming modes based on whether an odd or even number of the single-page transitions have been counted. when an odd number of the transitions have been counted, no two-page transition is allowed; otherwise, one or more two-page transitions are allowable. a next transition of atomic programming modes is selected based on the determining of whether or not to allow any two-page transitions.

Inventor(s): Sanjay Subbarao, James Fitzpatrick

CPC Classification: G06F12/0882 (in hierarchically structured memory systems, e.g. virtual memory systems)

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