SELF-ADAPTATION OF DRAM COMMAND/ADDRESS INTERFACE

Abstract: a decision counter circuit is used in a self-adaptation circuit to apply digital averaging to input signals to obtain adaptive settings of circuit parameters for a memory chip of a memory device during the operation. individual adaptive settings of the parameters (e.g., impedance, capacitance, equalization parameters) during operation are obtained for each of the memory chips in the memory device. the self-adaptation enables equalization adjustment across temperature and voltage drift.

Inventor(s): Jennifer E. Taylor, Timothy M. Hollis, Eric J. Stave, Chulkyu Lee, Chris Gregory Holub

CPC Classification: G06F11/1016 ({Error in accessing a memory location, i.e. addressing error})

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