MEMORY SYSTEM WITH SELECTIVE ACCESS TO FIRST AND SECOND MEMORIES

Abstract: a memory system includes a nonvolatile memory having a plurality of nonvolatile memory chips incorporated therein, a control circuit that controls the nonvolatile memory, an mpu that controls the control circuit, and an interface circuit that communicates with a host, all of which are mounted on a board of the memory system, and the memory system further includes a bus switch that switches connection of a signal line between the control circuit and the nonvolatile memory chips.

Inventor(s): Yasushi NAGADOMI

CPC Classification: G06F3/0604 (Digital input from, or digital output to, record carriers {, e.g. RAID, emulated record carriers or networked record carriers})

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