HIGH DATA RATE INTEGRATED CIRCUIT WITH TRANSMITTER CONFIGURATION

Abstract: a high data rate integrated circuit, such as an integrated circuit including a large sensor array, may be implemented using clock multipliers in individual power domains, coupled to sets of transmitters, including a transmitter pair configuration. reference clock distribution circuitry on the integrated circuit distributes a relatively low speed reference clock. in a transmitter pair configuration, each pair comprises a first transmitter and a second transmitter in a transmitter power domain. also, each pair of transmitters includes a clock multiplier connected to the reference clock distribution circuitry, and disposed between the first and second transmitters, which produces a local transmit clock.

Inventor(s): Keith G. Fife, Jungwook Yang

CPC Classification: G01N27/4145 (INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing processes other than immunoassay, involving enzymes or microorganisms , ))

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