19018452. Transient Stabilized SOI FETs (pSemi Corporation)
Transient Stabilized SOI FETs
Organization Name
Inventor(s)
Robert Mark Englekirk of Littleton CO US
Keith Bargroff of San Diego CA US
Christopher C. Murphy of Lake Zurich IL US
Tero Tapio Ranta of San Diego CA US
Simon Edward Willard of Irvine CA US
Transient Stabilized SOI FETs
This abstract first appeared for US patent application 19018452 titled 'Transient Stabilized SOI FETs
Original Abstract Submitted
Integrated circuits (ICs) that avoid or mitigate creation of changes in accumulated charge in a silicon-on-insulator (SOI) substrate, particularly an SOI substrate having a trap rich layer. In one embodiment, a FET is configured such that, in a standby mode, the FET is turned OFF while maintaining essentially the same Vas during an active mode. In another embodiment, a FET is configured such that, in a standby mode, current flow through the FET is interrupted while maintaining essentially the same Vas during the active mode. In another embodiment, a FET is configured such that, in a standby mode, the FET is switched into a very low current state (a âtrickle currentâ state) that keeps both Vand Vclose to their respective active mode operational voltages. Optionally, S-contacts may be formed in an IC substrate to create protected areas that encompass FETs that are sensitive to accumulated charge effects.
- PSemi Corporation
- Robert Mark Englekirk of Littleton CO US
- Keith Bargroff of San Diego CA US
- Christopher C. Murphy of Lake Zurich IL US
- Tero Tapio Ranta of San Diego CA US
- Simon Edward Willard of Irvine CA US
- H01L23/60
- H01L21/762
- H01L23/552
- H01L23/66
- H03K17/0412
- H03K17/0416
- H03K17/042
- H03K17/14
- H03K17/687
- H10D30/67
- H10D62/17
- H10D86/00
- H10D86/40
- H10D86/60
- H10D87/00
- CPC H01L23/60