18990461. COMPONENT INTER-DIGITATED VIAS AND LEADS (Micron Technology, Inc.)
COMPONENT INTER-DIGITATED VIAS AND LEADS
Organization Name
Inventor(s)
Christopher F. Kinney of Folsom CA US
COMPONENT INTER-DIGITATED VIAS AND LEADS
This abstract first appeared for US patent application 18990461 titled 'COMPONENT INTER-DIGITATED VIAS AND LEADS
Original Abstract Submitted
Aspects of the present disclosure are directed to systems and methods to reduce inductance on an integrated circuit package of a memory sub-system. A memory sub-system is also hereinafter referred to as a “memory device.” An example of a memory sub-system is a storage system, such as a SSD, and can be embodied as an integrated circuit package, including but not limited to a pin grid array (PGA), and ball grid array (BGA).