18973439. BIT ERROR MANAGEMENT IN MEMORY DEVICES (Micron Technology, Inc.)
BIT ERROR MANAGEMENT IN MEMORY DEVICES
Organization Name
Inventor(s)
Walter Di Francesco of Avezzano IT
Andrea D'alessandro of Avezzano IT
Agostino Macerola of San Benedetto dei Marsi IT
BIT ERROR MANAGEMENT IN MEMORY DEVICES
This abstract first appeared for US patent application 18973439 titled 'BIT ERROR MANAGEMENT IN MEMORY DEVICES
Original Abstract Submitted
In some implementations, a memory device may receive a command to read data in a first format from non-volatile memory, the data being stored in a second format in the non-volatile memory, the second format comprising a plurality of copies of the data in the first format. The memory device may compare, using an error correction circuit, the plurality of copies of the data to determine a dominant bit state for bits of the data. The memory device may store the dominant bit state for bits of the data in the non-volatile memory as error-corrected data in the first format. The memory device may cause the error-corrected data to be read from the non-volatile memory in the first format as a response to the command to read the data in the first format.
- Micron Technology, Inc.
- Jeremy Binfet of Boise ID US
- Tommaso Vali of Sezze IT
- Walter Di Francesco of Avezzano IT
- Luigi Pilolli of L'Aquila IT
- Angelo Covello of Avezzano IT
- Andrea D'alessandro of Avezzano IT
- Agostino Macerola of San Benedetto dei Marsi IT
- Cristina Lattaro of Rieti IT
- Claudia Ciaschi of Latina IT
- G06F3/06
- CPC G06F3/061