18955554. CONTROLLER ARCHITECTURE FOR RELIABILITY, AVAILABILITY, SERVICEABILITY ACCESS (Micron Technology, Inc.)

CONTROLLER ARCHITECTURE FOR RELIABILITY, AVAILABILITY, SERVICEABILITY ACCESS

Organization Name

Micron Technology, Inc.

Inventor(s)

Emanuele Confalonieri of Segrate (IT)

[[:Category:Antonino Capr� of Bergamo (IT)|Antonino Capr� of Bergamo (IT)]][[Category:Antonino Capr� of Bergamo (IT)]]

Nicola Del Gatto of Cassina de’ Pecchi (IT)

Federica Cresci of Milan (IT)

Massimiliano Turconi of Gorgonzola (IT)

CONTROLLER ARCHITECTURE FOR RELIABILITY, AVAILABILITY, SERVICEABILITY ACCESS

This abstract first appeared for US patent application 18955554 titled 'CONTROLLER ARCHITECTURE FOR RELIABILITY, AVAILABILITY, SERVICEABILITY ACCESS

Original Abstract Submitted

An apparatus can include a plurality of memory devices and a memory controller coupled to the plurality of memory devices via a plurality of memory channels. The plurality of memory channels can be each organized as a plurality of channel groups that can be operated as independent RAS channels (e.g., channels for independent RAS accesses). Data received at the memory controller via different memory channels of one RAS channel can be aligned at various circuits and/or components of the memory controller.