18913710. WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN (MICRON TECHNOLOGY, INC.)
WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN
Organization Name
Inventor(s)
Mattia Robustelli of Milano IT
Innocenzo Tortorelli of Cernusco Sul Naviglio IT
WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN
This abstract first appeared for US patent application 18913710 titled 'WRITE LATENCY AND ENERGY USING ASYMMETRIC CELL DESIGN
Original Abstract Submitted
Methods, systems, and devices for improving write latency and energy using asymmetric cell design are described. A memory device may implement a programming scheme that uses low programming pulses based on an asymmetric memory cell design. For example, the asymmetric memory cells may have electrodes with different contact areas (e.g., widths) and may accordingly be biased to a desired polarity (e.g., negative biased or positive biased) for programming operations. That is, the asymmetric memory cell design may enable an asymmetric read window budget. For example, an asymmetric memory cell may be polarity biased, supporting programming operations for logic states based on the polarity bias.