18903605. SYSTEM ON CHIP WITH SAFE HARDWARE SUBSYSTEM (Infineon Technologies AG)
SYSTEM ON CHIP WITH SAFE HARDWARE SUBSYSTEM
Organization Name
Inventor(s)
Jens Barrenscheen of München DE
Gerald Derflinger of Gratwein-Straßengel AT
SYSTEM ON CHIP WITH SAFE HARDWARE SUBSYSTEM
This abstract first appeared for US patent application 18903605 titled 'SYSTEM ON CHIP WITH SAFE HARDWARE SUBSYSTEM
Original Abstract Submitted
A system includes a data bus and (at least) a first subsystem having a bus interface coupled to the data bus. The first subsystem is capable of operating in a safe state and in a normal state, and it includes a control logic configured to transition the first subsystem into the safe state in response to a configuration command. The first subsystem further includes at least one hardware module configured to generate a default-output in the safe state and a non-default output in the normal state; memory coupled to the bus interface and configured to receive configuration data for the hardware module from the data bus and to store the received configuration data; and a data validator configured to validate, while the first subsystem is in the safe state, the configuration data and to signal, to the control logic, whether the configuration data is valid. The control logic is configured to transition the first subsystem into normal state in response to the data validator signaling that the configuration data is valid, and the hardware module is configured to receive—in response to the data validator signaling that the configuration data is valid—the validated data and use it to generate the non-default output.