INTEGRATED CIRCUIT WITH LOW POWER MODE MANAGEMENT

Organization Name

TEXAS INSTRUMENTS INCORPORATED

Inventor(s)

Venkateswar Kowkutla of ALLEN TX (US)

Kazunobu Shin of PLANO TX (US)

Venkateswara Pothireddy of MCKINNEY TX (US)

Siva Kothamasu of FRISCO TX (US)

John Apostol of RICHARDSON TX (US)

Raghavendra Santhanagopal of MCKINNEY TX (US)

Rajagopal Kollengode Ananthanarayanan of PLANO TX (US)

Rejitha Nair of SOUTHLAKE (IS)

Charles Gerlach of DALLAS TX (US)

Ravi Teja Reddy of DALLAS TX (US)

INTEGRATED CIRCUIT WITH LOW POWER MODE MANAGEMENT

This abstract first appeared for US patent application 18897219 titled 'INTEGRATED CIRCUIT WITH LOW POWER MODE MANAGEMENT

Original Abstract Submitted

In described examples, an integrated circuit (IC) includes an isolation, an input/output (IO), and a low power mode (LPM) control logic. The isolation includes a level shift with pull-down configured to weakly pull down the voltage of signals that travel through the isolation. The IO includes an input and a physical connector for coupling to a power management IC. The IO provides an asserted-low LPM enable signal to the physical connector in response to the IO input. An output of the LPM control logic is coupled via the isolation to the input of the IO. The LPM control logic provides a high voltage signal to the input of the IO as a default during power on reset (POR) of the IC. The pull-down pulls the LPM enable signal voltage to the asserted low voltage in response to a voltage of the LPM enable signal falling below a threshold.