18894180. STATIC POWER REDUCTION IN CACHES USING DETERMINISTIC NAPS (TEXAS INSTRUMENTS INCORPORATED)
STATIC POWER REDUCTION IN CACHES USING DETERMINISTIC NAPS
Organization Name
TEXAS INSTRUMENTS INCORPORATED
Inventor(s)
Oluleye Olorode of Pflugerville TX (US)
Mehrdad Nourani of Plano TX (US)
STATIC POWER REDUCTION IN CACHES USING DETERMINISTIC NAPS
This abstract first appeared for US patent application 18894180 titled 'STATIC POWER REDUCTION IN CACHES USING DETERMINISTIC NAPS
Original Abstract Submitted
Disclosed embodiments relate to a dNap architecture that accurately transitions cache lines to full power state before an access to them. This ensures that there are no additional delays due to waking up drowsy lines. Only cache lines that are determined by the DMC to be accessed in the immediate future are fully powered while others are put in drowsy mode. As a result, we are able to significantly reduce leakage power with no cache performance degradation and minimal hardware overhead, especially at higher associativities. Up to 92% static/leakage power savings are accomplished with minimal hardware overhead and no performance tradeoff.
