18893499. POOLED MEMORY ADDRESS TRANSLATION (INTEL CORPORATION)

POOLED MEMORY ADDRESS TRANSLATION

Organization Name

INTEL CORPORATION

Inventor(s)

Debendra Das Sharma of Saratoga CA US

POOLED MEMORY ADDRESS TRANSLATION

This abstract first appeared for US patent application 18893499 titled 'POOLED MEMORY ADDRESS TRANSLATION

Original Abstract Submitted

A shared memory controller receives, from a computing node, a request associated with a memory transaction involving a particular line in a memory pool. The request includes a node address according to an address map of the computing node. An address translation structure is used to translate the first address into a corresponding second address according to a global address map for the memory pool, and the shared memory controller determines that a particular one of a plurality of shared memory controllers is associated with the second address in the global address map and causes the particular shared memory controller to handle the request.