CACHING LOOKUP TABLES FOR BLOCK FAMILY ERROR AVOIDANCE

Organization Name

Inventor(s)

Shakeel Isamohiuddin Bukhari of San Jose CA (US)

CACHING LOOKUP TABLES FOR BLOCK FAMILY ERROR AVOIDANCE

This abstract first appeared for US patent application 18821283 titled 'CACHING LOOKUP TABLES FOR BLOCK FAMILY ERROR AVOIDANCE

Original Abstract Submitted

In some implementations, a memory device may cache a subset of one or more block family error avoidance (BFEA) lookup tables associated with a block family associated with host data in a first memory location. The block family may be based on at least one of a time window during which the host data was written or a temperature window at which the host data was written. The memory device may receive a read command associated with host data and determine, based on the block family and the subset of the one or more BFEA tables, a threshold voltage offset associated with the host data. The memory device may compute a modified threshold voltage by applying the threshold voltage offset to a base read level voltage associated with the host data. The memory device may read, using the modified threshold voltage, the host data from the first memory location.