18795437. Coherency Control for Compressed Graphics Data (Apple Inc.)
Coherency Control for Compressed Graphics Data
Organization Name
Inventor(s)
Karthik Ramani of San Jose CA US
Tyson J. Bergland of Sunnyvale CA US
Leela Kishore Kothamasu of Fremont CA US
Hongzhou Zhao of Los Altos CA US
Winnie W. Yeung of San Jose CA US
Coherency Control for Compressed Graphics Data
This abstract first appeared for US patent application 18795437 titled 'Coherency Control for Compressed Graphics Data
Original Abstract Submitted
Techniques are disclosed relating to data compression in graphics processors. In some embodiments, cache circuitry is coupled to shader processor circuitry and is configured to store graphics data that includes a compressed block of data associated with a surface and metadata for the compressed block of data. Metadata coherence circuitry may cache the metadata for the compressed block of data, receive an indication of a write command for non-compressed data associated with the surface, wherein the write command identifies the metadata and has a different address than the compressed block of data, and determine, based on the metadata and the indication, to invalidate the compressed block of data in the cache circuitry. This may maintain read/write coherence in a cache that stores both compressed and uncompressed data, in some embodiments.
