SEMICONDUCTOR DEVICES HAVING PERIPHERAL CONTACT PLUGS

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SEMICONDUCTOR DEVICES HAVING PERIPHERAL CONTACT PLUGS

This abstract first appeared for US patent application 18666612 titled 'SEMICONDUCTOR DEVICES HAVING PERIPHERAL CONTACT PLUGS

Original Abstract Submitted

An example semiconductor device includes a substrate including a cell array region and a connection region, a peripheral circuit layer, a bit line disposed on the peripheral circuit layer in the cell array region, a first upper interconnection disposed in the connection region on a same height as the bit line is from the substrate, at least one lower interconnection layer disposed between the peripheral circuit layer and the bit line and between the peripheral circuit layer and the first upper interconnection, a bit line insulating layer surrounding the bit line in the cell array region and the first upper interconnection in the connection region, an upper structure disposed on the bit line and the first upper interconnection, an information storage structure disposed on the upper structure in the cell array region, and a lower contact plug electrically connected to the at least one lower interconnection layer.