SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

Organization Name

KIOXIA CORPORATION

Inventor(s)

Yosuke Mitsuno of Yokkaichi Mie (JP)

Ryouji Masuda of Yokkaichi Mie (JP)

Tatsufumi Hamada of Nagoya Aichi (JP)

Tomohiro Kuki of Yokkaichi Mie (JP)

Yusuke Morikawa of Yokkaichi Mie (JP)

SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18587080 titled 'SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

Simplified Explanation: The patent application describes a semiconductor memory device with a unique structure involving stacked layers of insulating and conductive materials, forming memory cell transistors. The device includes columnar bodies with semiconductor portions of varying lengths and impurity concentrations.

The semiconductor memory device has a chip shape.
Stacked body formed by alternating insulating and conductive layers.
Columnar bodies extend in the stacked body, with varying semiconductor portions.
Insulating film provided at the end portion of the device.
Impurity concentration in the semiconductor portions differs, with higher concentration in the second columnar body.

Key Features and Innovation:

Stacked structure of insulating and conductive layers for memory cell transistors.
Varying lengths and impurity concentrations in semiconductor portions.
Unique design for improved memory cell performance.

Potential Applications:

Semiconductor memory devices
Integrated circuits
Electronic devices requiring memory storage

Problems Solved:

Enhanced memory cell performance
Efficient data storage
Improved semiconductor device reliability

Benefits:

Higher memory cell efficiency
Increased data storage capacity
Enhanced semiconductor device functionality

Commercial Applications: Title: Semiconductor Memory Device with Stacked Body Structure This technology can be applied in the production of advanced semiconductor memory devices for various electronic applications, potentially impacting the market for memory storage solutions.

Prior Art: Readers can explore prior research on semiconductor memory devices, stacked body structures, and memory cell transistor designs to understand the evolution of this technology.

Frequently Updated Research: Researchers are continually exploring new materials and designs to enhance semiconductor memory devices' performance and efficiency.

Questions about Semiconductor Memory Device with Stacked Body Structure: 1. How does the impurity concentration affect the performance of the semiconductor memory device? 2. What are the potential challenges in scaling this technology for mass production?

Original Abstract Submitted

A semiconductor memory device has a chip shape. A stacked body is formed by alternately stacking, in a first direction, a plurality of first insulating layers and a plurality of first conductive layers each of which functions as a control gate of a memory cell transistor. A first columnar body extends in the first direction in the stacked body and includes a first semiconductor portion. An insulating film is provided at an end portion of the semiconductor memory device. A second columnar body extends in the first direction in the insulating film and includes a second semiconductor portion that is shorter than the first semiconductor portion in the first direction. An impurity concentration of the second semiconductor portion at a bottom portion of the second columnar body is higher than that of the first semiconductor portion at an intersection portion between the first columnar body and the first conductive layer.