WAFER AND METHOD FOR MANUFACTURING THE SAME

Organization Name

Kabushiki Kaisha Toshiba

Inventor(s)

Mitsuhiro Kushibe of Setagaya Tokyo (JP)

Ryosuke Iijima of Setagaya Tokyo (JP)

Johji Nishio of Machida Tokyo (JP)

Chiharu Ota of Kawasaki Kanagawa (JP)

Tatsuo Shimizu of Shinagawa Tokyo (JP)

WAFER AND METHOD FOR MANUFACTURING THE SAME

This abstract first appeared for US patent application 18581445 titled 'WAFER AND METHOD FOR MANUFACTURING THE SAME

Original Abstract Submitted

According to one embodiment, a wafer includes a substrate including SiC, and a first layer including SiC. The first layer is in contact with the substrate. The first layer includes Cr. The substrate does not include Cr. Or a concentration of Cr in the substrate is lower than a concentration of Cr in the first layer. A substrate length of the substrate in a second direction crossing a first direction from the substrate to the first layer is longer than a first layer length of the first layer in the second direction.