18581018. NONVOLATILE MEMORY DEVICES simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
NONVOLATILE MEMORY DEVICES
Organization Name
Inventor(s)
Hee-Woong Kang of Suwon-si (KR)
Dong-Hun Kwak of Suwon-si (KR)
NONVOLATILE MEMORY DEVICES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18581018 titled 'NONVOLATILE MEMORY DEVICES
The patent application describes a nonvolatile memory device with a memory cell array and a row decoder, featuring multiple mats with cell strings connected to word-lines, bit-lines, and string selection lines.
- Memory cell array with multiple mats
- Cell strings in each mat with ground selection transistor, memory cells, and string selection transistor
- Row decoder applies different voltages to word-lines for single mat and multi-mat modes
Potential Applications: - Data storage in electronic devices - Embedded systems in IoT devices - Industrial automation for data logging
Problems Solved: - Efficient data storage in a nonvolatile memory device - Improved data retrieval speed - Enhanced memory cell array organization
Benefits: - Faster data access - Higher data storage capacity - Improved overall performance of electronic devices
Commercial Applications: Title: "Advanced Nonvolatile Memory Devices for Enhanced Data Storage" This technology can be utilized in smartphones, tablets, laptops, and other electronic devices requiring nonvolatile memory for data storage.
Prior Art: Researchers can explore prior patents related to nonvolatile memory devices, row decoders, and memory cell arrays to understand the evolution of this technology.
Frequently Updated Research: Researchers are constantly working on improving the efficiency and capacity of nonvolatile memory devices, which may lead to advancements in this field.
Questions about Nonvolatile Memory Devices: 1. How does the row decoder in this nonvolatile memory device enhance data access speed? 2. What are the key differences between single mat mode and multi-mat mode in this memory device?
Original Abstract Submitted
A nonvolatile memory device includes a memory cell array and a row decoder. The memory cell array includes a plurality of mats. A first cell string of first mat is connected to a plurality of first word-lines, a first bit-line and a first string selection line. A second cell string of second mat is connected to a plurality of second word-lines, a second bit-line and a second string selection line. Each of the first and second cell strings includes a ground selection transistor, memory cells, and a string selection transistor coupled in series. The row decoder applies a first voltage to a third word-line among the plurality of first and second word-lines for a first period of time in a single mat mode and to apply a second voltage to the third word-line for a second period of time longer than the first period of time in a multi-mat mode.
