18570915. GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS (GOOGLE LLC)
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
Organization Name
Inventor(s)
Ebrahim Songhori of San Jose CA US
Wenjie Jiang of Mountain View CA US
Sergio Guadarrama Cotado of Berkeley CA US
Young-Joon Lee of San Jose CA US
Azalia Mirhoseini of Mountain View CA US
Anna Darling Goldie of San Francisco CA US
Roger David Carpenter of San Francisco CA US
Yuting Yue of San Francisco CA US
Kuang-Huei Lee of San Francisco CA US
Toby James Boyd of Lewis Center OH US
GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
This abstract first appeared for US patent application 18570915 titled 'GENERATING INTEGRATED CIRCUIT PLACEMENTS USING NEURAL NETWORKS
Original Abstract Submitted
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating a computer chip placement. One of the methods includes training, through reinforcement learning, a node placement neural network that is configured to, at each of a plurality of time steps, receive an input representation comprising data representing a current state of a placement of a netlist of nodes on a surface of an integrated circuit chip as of the time step and process the input representation to generate a score distribution over a plurality of positions on the surface of the integrated circuit chip.
- GOOGLE LLC
- Ebrahim Songhori of San Jose CA US
- Wenjie Jiang of Mountain View CA US
- Sergio Guadarrama Cotado of Berkeley CA US
- Young-Joon Lee of San Jose CA US
- Azalia Mirhoseini of Mountain View CA US
- Anna Darling Goldie of San Francisco CA US
- Roger David Carpenter of San Francisco CA US
- Yuting Yue of San Francisco CA US
- Kuang-Huei Lee of San Francisco CA US
- James Laudon of Madison WI US
- Toby James Boyd of Lewis Center OH US
- Quoc V. Le of Sunnyvale CA US
- G06F30/392
- G06F30/27
- G06F30/394
- CPC G06F30/392
