18534754. SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF (UNITED MICROELECTRONICS CORP.)
SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
Organization Name
Inventor(s)
Tai-Cheng Hou of Tainan City TW
Da-Jun Lin of Kaohsiung City TW
Bin-Siang Tsai of Changhua County TW
SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
This abstract first appeared for US patent application 18534754 titled 'SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF
Original Abstract Submitted
A semiconductor structure includes a SOI substrate having a device layer and a buried oxide layer contiguous with the device layer; a transistor disposed on the device layer; a dielectric layer surrounding the transistor; an interconnect structure disposed on the dielectric layer and electrically connected to a gate of the transistor; a charge trapping layer contiguous with the buried oxide layer; a capping layer contiguous with the charge trapping layer; and a conductive via penetrating through the capping layer, the charge trapping layer, the buried oxide layer, the device layer, and the dielectric layer. The conductive via is electrically connected to the interconnect structure.
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