TSV TESTING

Organization Name

Inventor(s)

TSV TESTING - A simplified explanation of the abstract

This abstract first appeared for US patent application 18526497 titled 'TSV TESTING

Simplified Explanation

The integrated circuit die described in the patent application includes a substrate with an opening through it, a through silicon via (TSV) with a conductive body in the opening, and a scan cell with various inputs and outputs.

The integrated circuit die has a substrate made of semiconductor material.
The substrate has a top surface, a bottom surface, and an opening between the two surfaces.
A through silicon via (TSV) is present in the opening.
The TSV has a conductive body, a top contact point at the top surface, and a bottom contact point at the bottom surface.
A scan cell is included in the integrated circuit die.
The scan cell has a serial input, a serial output, control inputs, a voltage reference input, a response input connected to one of the contact points, and a stimulus output connected to the other contact point.

Potential Applications

This technology could be used in:

High-performance computing systems
Advanced communication devices
Automotive electronics

Problems Solved

Improved signal transmission between different layers of the integrated circuit
Enhanced testing and debugging capabilities

Benefits

Higher efficiency in data processing
Increased reliability in circuit operation
Simplified testing procedures

Potential Commercial Applications

Optimized for:

Data centers
Telecommunications industry
Automotive sector

Possible Prior Art

Prior art may include:

Existing through silicon via technologies
Scan cell designs in integrated circuits

Unanswered Questions

How does this technology impact power consumption in the integrated circuit?

The patent application does not provide information on the power efficiency of the integrated circuit die.

Are there any limitations to the size or complexity of the integrated circuit that can incorporate this technology?

The patent application does not address any potential limitations regarding the size or complexity of the integrated circuit die.

Original Abstract Submitted

An integrated circuit die includes a substrate of semiconductor material having a top surface, a bottom surface, and an opening through the substrate between the top surface and the bottom surface. A through silicon via (TSV) has a conductive body in the opening, has a top contact point coupled to the body at the top surface, and has a bottom contact point coupled to the body at the bottom surface. A scan cell has a serial input, a serial output, control inputs, a voltage reference input, a response input coupled to one of the contact points, and a stimulus output coupled to the other one of the contact points.

18526497. TSV TESTING simplified abstract (TEXAS INSTRUMENTS INCORPORATED)