18506544. APPARATUS FOR RECEIVING DATA FROM MEMORY simplified abstract (ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE)
APPARATUS FOR RECEIVING DATA FROM MEMORY
Organization Name
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
Inventor(s)
Young-deuk Jeon of Sejong-si (KR)
Jae-Woong Choi of Daejeon (KR)
APPARATUS FOR RECEIVING DATA FROM MEMORY - A simplified explanation of the abstract
This abstract first appeared for US patent application 18506544 titled 'APPARATUS FOR RECEIVING DATA FROM MEMORY
Simplified Explanation
The apparatus described in the abstract is a Decision Feedback Equalizer (DFE) designed to receive data signals and clock signals from memory. The DFE includes multiple differential signal path units that determine and output an output value corresponding to the data signal. Each unit operates at different clocks and adjusts offset and feedback to improve performance.
- The apparatus is designed to receive data signals and clock signals from memory.
- It includes a Decision Feedback Equalizer (DFE) with multiple differential signal path units.
- Each unit operates at different clocks to improve performance.
- An offset control unit adjusts the offset at the input stage.
- A feedback control unit changes the load of the output stage using the previous output value fed back from a different unit.
Potential Applications
The technology can be applied in high-speed data communication systems, memory interfaces, and signal processing applications.
Problems Solved
The apparatus helps in improving data signal reception, reducing noise, and enhancing signal integrity in memory systems.
Benefits
The benefits of this technology include improved data transmission reliability, increased data transfer speeds, and enhanced overall system performance.
Potential Commercial Applications
Potential commercial applications include data centers, telecommunications equipment, high-speed computing systems, and networking devices.
Possible Prior Art
One possible prior art could be the use of Decision Feedback Equalizers in communication systems to improve signal reception and data integrity.
Unanswered Questions
How does the apparatus handle variations in signal strength and noise levels?
The abstract does not provide details on how the apparatus adapts to different signal conditions to maintain optimal performance.
What is the power consumption of the apparatus compared to existing solutions?
The abstract does not mention anything about the power efficiency of the apparatus in comparison to other similar technologies.
Original Abstract Submitted
Disclosed herein is an apparatus for receiving data from memory. The apparatus receives a data signal and a clock signal output from memory and includes a Decision Feedback Equalizer (DFE) including two or more differential signal path units configured to determine and output an output value corresponding to the data signal. Each of the two or more differential signal path units may determine a current output value by reflecting a previous output value fed back from a different one of the two or more differential signal path units in such a way that they operate at different clocks, and may include an offset control unit configured to adjust an offset at an input stage and a feedback control unit configured to change a load of an output stage using the previous output value fed back from the different one of the two or more differential signal path units.
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