METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE

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METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18497446 titled 'METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE

Simplified Explanation: The patent application describes a method of manufacturing an integrated circuit device by forming a stack structure with sacrificial semiconductor layers and nanosheet semiconductor layers, and then creating insulating spaces and structures to expose the fin-type active region.

The method involves forming a stack structure with alternating sacrificial semiconductor layers and nanosheet semiconductor layers.
Local liners are formed on the sidewalls of the stack structure to cover specific layers while exposing others.
Insulating spaces are created by removing sacrificial semiconductor layers to expose the fin-type active region.
Insulating structures are then formed in the insulating spaces to complete the integrated circuit device manufacturing process.

Key Features and Innovation:

Formation of a stack structure with sacrificial and nanosheet semiconductor layers.
Use of local liners to selectively cover and expose specific layers.
Creation of insulating spaces and structures to expose the fin-type active region.

Potential Applications: This technology can be applied in the manufacturing of integrated circuit devices for various electronic applications, including smartphones, computers, and other electronic devices.

Problems Solved: This method addresses the need for precise and controlled manufacturing processes in the production of integrated circuit devices.

Benefits:

Improved precision and control in the manufacturing process.
Enhanced performance and efficiency of integrated circuit devices.
Potential for smaller and more advanced electronic devices.

Commercial Applications: The technology can be utilized in the semiconductor industry for the production of advanced integrated circuit devices, catering to the growing demand for smaller and more efficient electronic products.

Prior Art: Readers can explore prior research on semiconductor manufacturing processes, nanosheet technology, and integrated circuit device fabrication to understand the background of this innovation.

Frequently Updated Research: Researchers may find updated studies on nanotechnology, semiconductor materials, and integrated circuit design relevant to this technology.

Questions about Integrated Circuit Device Manufacturing: 1. What are the key challenges in manufacturing integrated circuit devices using nanosheet semiconductor layers? 2. How does the use of sacrificial semiconductor layers impact the performance of the integrated circuit device?

Original Abstract Submitted

A method of manufacturing an integrated circuit device includes forming, on a substrate, a fin-type active region and a stack structure in which sacrificial semiconductor layers and nanosheet semiconductor layers are alternately stacked one-by-one, forming a first local liner on a sidewall of the stack structure to cover a sidewall of a bottom sacrificial semiconductor layer, which is closest to the fin-type active region and expose sidewalls of other sacrificial semiconductor layers, forming a second local liner on the sidewall of the stack structure to cover the sidewalls of the other sacrificial semiconductor layers except for the bottom sacrificial semiconductor layer, exposing the bottom sacrificial semiconductor layer by removing the first local liner, forming a bottom insulating space exposing a fin top surface of the fin-type active region by removing the bottom sacrificial semiconductor layer, and forming a bottom insulating structure in the bottom insulating space.