18492194. DISPLAY PANEL AND DISPLAY DEVICE simplified abstract (BOE TECHNOLOGY GROUP CO., LTD.)
DISPLAY PANEL AND DISPLAY DEVICE
Organization Name
BOE TECHNOLOGY GROUP CO., LTD.
Inventor(s)
DISPLAY PANEL AND DISPLAY DEVICE - A simplified explanation of the abstract
This abstract first appeared for US patent application 18492194 titled 'DISPLAY PANEL AND DISPLAY DEVICE
Simplified Explanation
Embodiments of the present disclosure provide a display panel with a base substrate, pixel units, and gate line groups. Each pixel unit includes sub-pixels with sensing and driving transistors. The gate line groups have first and second gate lines, with sensing transistors closer to the second gate lines and driving transistors closer to the first gate line. Signal lines with a double-layer alignment structure connect sub-pixels in different pixel units in the same row.
- The display panel includes pixel units with sub-pixels having sensing and driving transistors.
- Gate line groups have first and second gate lines, with specific positioning of transistors.
- Signal lines have a double-layer alignment structure to connect sub-pixels in different pixel units.
- The technology improves the performance and efficiency of display panels.
- Potential Applications
- Consumer electronics such as smartphones, tablets, and laptops
- Televisions and monitors
- Automotive displays
- Problems Solved
- Improved performance and efficiency of display panels
- Enhanced image quality and resolution
- Better integration of sub-pixels within pixel units
- Benefits
- Higher quality display panels
- Increased efficiency and performance
- Enhanced user experience with sharper images and better color accuracy
Original Abstract Submitted
Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.
